- saveDesign Dbname.enc
- defOut -floorPlan -scanChain -netlist -routing dbName.def
- saveNetlist dbName.v
- extractRC
- rcOut -spef spef.name -corner <corner_Name>
- streamOut design_name.gds -library lib_name -map stramOut.map
Search This Blog
Subscribe to:
Post Comments (Atom)
What is the sanity checks you have done for STA?
Sanity checks for STA: Linking Checks: We need to check., is there any missing modules or missing pins in a library. this is done by link c...
-
Sanity checks for STA: Linking Checks: We need to check., is there any missing modules or missing pins in a library. this is done by link c...
-
Max transition violations Upsize the cell. Insert a buffer when the net is dominant. Buffer can be replaced with inverter pair. Move the ce...
-
Floor plan Reports checkFPlan -reportUtil checkPlace Check_timing -verbose CheckNetlist CheckUnique Report_qor Report_timing checkPinAssig...
No comments:
Post a Comment