Interview Questions Part 1

 1.Which tools are used for IR Drop Analysis

• Voltus From cadence
• Redhak from Ansis
• Prime Power From Synopsys

2.How did You fix IR Drop in you design?

• Increasing the Width of the Stripe
• Increase the number of stripes
• Use Partial Blockage
• Spread the logic by using Keep_out Margin  
• Use Decap cells
• Increase the number of Power sources

3.What was the threshold value of IR Drop

• Basically 5% of the VDD is consider for allowable Drop other wise we may is the Drop issue

4.How did You resolve the Antenna Effect

• We can reduce the antenna Violation by adding the Diode in reverse bias at Near the Gate terminal of the transistor
• Metal jumping is also one of the technique to resolve the antenna violation

5.How is Antenna Issue Causing

• While doing the CMP (Chemical Mechanical Process) Process The charge is induced in the net, the Induced charge is choosing the path to discharge,it will start discharging through the gate terminal of the Transistor ,the gate terminal may not have that much capable so it may damage 

6.Challenges faced during  your Project

• Congestion
• Macro Placement
• Set up Timing Violations And DRV Violations 

7. How you Done Manual Routing

• Yes , I have done Few Manual routing to create the stripe

8. What is the command to setting false path command

• set_false_path -from [get_clocks clk1] -to [get_clocks clk2]
• set_false_path -through [get_cells -of_objects [get_pins cellname/D]]

9.What were the settings given for CTS

• Clock Fanout 
• Clock cells ,clock buffers,clock inverters
• Clock Skew target
• Clock Transition
• Clock Insertion delay

10. What is Cross_talk and its Effect

• When two nets of the same metal layers runs parallel and close to each other ,signal on one net is switching (Aggressor) and another signal on another net is constant at that time the switching signal may affected to non switching signal net due to coupling capacitance is called the Cross_talk
• When the switching window is matching, timing will degrade otherwise Noise will come ,that noise is depends on magnitude and width
• If Aggressor and victims both are  switching in same direction ,victim transition becomes fast resulting data to arrival early which may cause hold time violation
• If Aggressor and victim both are switching in different direction, victim net signal transition slows down which increase the delay it may violate the setup time violation