Parasitic representation
RSPF: Reduced standard parasitics Format
SPEF: Standard parasitic extraction Format
- Standard parasitics Extraction Format interconnect parasitics depend on process. SPEF supports the specification of best-case, typical, and worst-case values.
- These triplets are allowed for R, L and C values, port slews and loads. By providing a name map consisting of a map of net names and instance names to indices, the SPEF file size is made effectively smaller, and more importantly, all long names appear in only one place.
- Detailed parasitics are represented in SPICE format, SPICE Comment statements are used to indicate the cell type, pin capacitance
- The resistance and capacitance values are in standard SPICE syntax and the cell instantiations are also included in this representation.
- Merits:
- DSPF file can be used as an input to a SPICE simulator itself.
- Drawback
- The DSPF syntax is too detailed and verbose with the result that the total file size for a typical block is very large.
RSPF: Reduced standard parasitics Format
- These parasitics are represented in reduced format and it involves in voltage-controlled current sources.
- Detailed parasitics are reduced and mapped into Reduced format it can be read into SPICE Simulators
- Drawbacks:
- Not represented for bidirectional signal flow
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