SETUP time Violations Fixing and How it impact on the design

                         SETUP TIME Violations fixing Techniques

The following techniques are used to fix the Setup time violations

1. Up-size the cell
2. HVT to LVT conversion
3. Add buffer on Data path

1).Up-size the buffer

• get_cells
• get_lib_cells -of_object cell_name  (which cell you want to up-size NOR2X0_HVT)
• get_alternative_lib_cells cell_name
• size_cell cell_name saed32hvt_ff1p16vn40c/NOR4X0_HVT (corresponding cell library with cell name )

Disadvantages:

• Cell size may increase 
• Location of the cell pins will change
• Nearer cells will move
• Transition time will increase it means data comes early it will impact on the hold

2). VT Swapping (HVT to LVT conversion)

• get_cells
• get_lib_cells -of_objects U453 (cell name NOR4X0_LVT)
• size_cell U453 NOR4X0_LVT  (U453 Instance name)

3).Add buffer

• insert_buffer net_name BUFX4

Disadvantages : 

• If the cell delay is more than the net delay will get the more timing violation
• If the net length is more, then only we will add the buffer other wise timing violations goes more worst 

Note: Here cell name means Instance name

4). Creating the Bound

• createInstGroup group_name
• createInstGroup group_name -guide { co- ordinates}
• addInstGroup group_name {instances names}

5). Up_size the flop

• If there is no possibility with the logic to up_size you can up_size the Launch Flop
• It will benefit just 3 to 10 ps
• May effect to Hold time violation