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Wednesday, October 23, 2019

Commands Used in Floorplan (ICC TOOL)

  • How to know the Utilization of the floor plan
  • Get_utilization
  • How to know how many macros are there in the design
  • sizeof_collection [all_macros]
  • Floorplan Creation
  • create_floorplan -left_io2core 20 -bottom_io2core 20 -right_io2core 20 top_io2core 20  \ -core_utilization 0.7 --core_aspect_ratio 1.0
  • How to apply the Keepout margin
  • set_keepout_margin  -type hard -all_macros -outer {2 2 2 2}
  • How to know how many clocks are there in your design
  • sizeof_collection [get_clocks]
  • How to get the Core area
  • get_attribute [get_core_area] bbox
  • How to get the Die area
  • get_attribute [get_die_area] bbox
  • How to find the Area of the cell
  • report_area
  • How to find the Reference cells area
  • report_references
  • How to find the Design statistics
  • check_physical_design   -design_statistics
  • How to know the Hierarchy information
  • set_hierarchy_color -cycle_color
  • How many Layer are there in the design
  • get_layers
  • How many Nets are there in the design
  • get_nets
  • Port information
  • get_ports
  • How to get the exact cell Location
  • get_location cellname
  • How to find the cell delay 
  • report_delay _calculations -from  xyz/a -to xyz/B
  • Libraries information
  • get_libs
  • Physical library information
  • get_physical_libs
  • How many buffers are there in the design 
  • sizeof_collection [get_bufers]
  • How many no of Inputs are there in the design 
  • sizeof_collection [get_inputs]
  • No of Outputs
  • sizeof_collection [get_outputs]
  • How to know no of Ports
  • sizeof_collection [get_ports *]
  • How to know Cell count
  • sizeof_collection [get_cells]
  • How to know Registers count
  • sizeof_collection [get_registers]
  • How to know Alternative lib cells of the cells
  • get_alternative_lib_cell cell_name
  • How to know Path group information
  • get_path_groups
  • How to know how many site rows are there in the design
  • sizeof_collection [get_site_rows]
  • How to find the Pins of the cell
  • get_pins -of_objects cells_name
  • How to know Timing qor of the design
  • report_timing
  • How to know Hold violations in the design 
  • report_timing -delay_type min
  • How to know Setup violations in the design 
  • report_timing -delay_type max
  • How to know all violated paths in the design
  • report_constraint -all_violators 
  • How to know DRC violations in the design 
  • report_constraint -all_violators -max_transistition
  • report_constraint -all_violators -capacitance
  • How to know Design QOR (Report_qor)
  • report_qor
  • How to create bound
  • create_bound -coordinates {{x1 y1}  {x2 y2}} -type hard/soft/Exclusive -object_list {cell1 cell2 cell3} 
  • How to get how many bounds are present in the design
  • get_bounds
  • How to get the number of blockages in  design
  • Get_placement_blockage
  • How to create the placement blockage
  • create_placement_blockage -coordinates { {x1 y1} {x2 y2}} -type hard/Soft -name blockagename
  • create_placement_blockage -coordinates { {x1 y1} {x2 y2}} -type partial -blocked_percentage x -name blockagename.

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